Arago (JEF) — Technical Architecture Primer

Architecture & the technical rationale behind it. No risk, market, or investment discussion. Prepared for BRPX · 2026-06-26

1 · Thesis in one line

Arago's chip JEF is a "multiphysics processor" that performs AI-inference math by combining analog electronics, digital electronics, silicon photonics, and free-space optics in one compute core — moving the heaviest operations (matrix multiply and data movement) out of transistors and into light, to cut energy ~10–30× vs. GPUs at comparable performance and cost. [External] [Company]

The bet is not "photonics as a faster wire." It is photonics as the compute medium — light itself carries out the multiply-accumulate (MAC) operations. [External]

Picture the whole idea first (the analog vs. digital contrast): a normal chip does the math by flipping billions of tiny electronic switches, one small step at a time. Arago does the same math with light — and light can multiply and add physically, in one shot, with almost no switching. That single difference is where the energy savings come from.

2 · The physical problem it targets

Modern AI accelerators are limited less by raw arithmetic than by moving operands. On a GPU, each byte fetched from memory is consumed by only a handful of operations before it must be written back or re-fetched — so most of the energy is spent shuttling data, not computing. [Company] Arago frames the contrast directly:

"a byte of data in a GPU is only used for a few operations, whereas on Arago's system, that same byte enables thousands of operations." [Company]

That sentence is the architectural north star: maximize operations-per-byte (operand reuse) so the expensive part — data movement — is amortized across far more useful math.

3 · The multiphysics stack — four domains, one core

JEF "combines elements of analog and digital electronics with silicon photonics and free-space optics." [External] Each physical domain is used for what it is best at:

No single physics wins alone: photonics is cheap to move but awkward to store/control; electronics is precise but expensive to move at scale. JEF assigns each step of a MAC to the domain where it costs least. [Inferred]

4 · How light computes the matrix multiply

A matrix–vector multiply is two primitives: multiply each input by a weight, then sum the products. Optical compute maps both onto light: [Inferred — standard analog-photonic principle, consistent with Arago's "multiphysics core"]

1. Encode input activations as the brightness/amplitude of optical signals (silicon-photonic modulators).
2. Multiply by passing that light through a weighting element (transmitted light = input × weight). Doing this for many weights in parallel is where free-space optics earns its place.
3. Accumulate by letting many weighted signals fall on a common detector; the photocurrents sum automatically — the detector output is the dot product, at almost no extra cost.
4. Read out the analog result through analog→digital electronics, under the deterministic control unit, back into the digital datapath.

Because steps 2–3 happen at the speed of light, in parallel across the whole tensor tile, a large block of MACs completes in effectively one optical pass — the mechanism behind both the multi-PetaOp/s throughput claim and the thousands-of-operations-per-byte reuse claim. [Company] [Inferred]

5 · The deterministic control unit & memory efficiency

Arago pairs the optical core with "a deterministic control unit for memory efficiency." [Company] The reasoning:

• Optical compute is cheap per operation, so the bottleneck shifts back to feeding it — getting the right operands to the right elements at the right time.
• A deterministic (statically scheduled, predictable-latency) controller lets the compiler stage data just-in-time, with minimal buffering and no cache-miss waste. [Inferred]
• This keeps operand reuse high in practice, making the energy claim a system property, not a peak-core figure. [Inferred]

§4 makes each operation cheap; §5 makes sure the chip is never idle or re-fetching, so the cheap operations actually dominate the energy budget.

6 · Where the architecture fits best

• Inference, not training. Arago targets data-center inference and dismisses training (clustering complexity, incumbent intensity). [External]
• Large-tensor sweet spot. The system "excels with tensor sizes in the hundreds and thousands" [Company] — the fixed cost of encoding/reading light is best amortized over big tensor tiles. [Inferred]
• Operand-reuse-heavy math (large dense matrix multiplies — transformer linear layers) is exactly what the design rewards. [Inferred]

7 · CARLOTA — the software abstraction

JEF is exposed through CARLOTA®, which abstracts the hardware so models from industry-standard frameworks run unchanged. [Company] It maps standard tensor graphs onto the optical tiles and the deterministic schedule, and hides the analog/photonic mechanics behind a conventional interface — Arago's stated requirement to be "compatible with everything from manufacturing processes to the AI software stack from day one." [Company] The determinism in §5 is what lets CARLOTA produce a fully static, ahead-of-time schedule. [Inferred]

8 · "Why now" — the manufacturing rationale

JEF is fabless and built only from components/processes that "became mature and cost-effective enough around one to two years ago," [External] and is "fully compatible with existing manufacturing processes." [External] [Company] The novelty lives in the multiphysics architecture and the compiler, while every physical building block (integrated photonics, modulators, detectors, standard CMOS control) is an off-the-shelf part. [Inferred] A working test chip has been demonstrated on a small card running inference across multiple models — evidence the datapath works end-to-end, not just in simulation. [External]

9 · One-screen architecture summary

Net architectural claim: by doing the multiply-and-sum in light, in parallel, over large tensor tiles, and feeding it with a deterministic, low-waste memory controller, JEF raises operations-per-byte by orders of magnitude — yielding the asserted ~10–30× energy reduction at multi-PetaOp/s for data-center inference, while remaining fabless, manufacturable on existing processes, and drop-in compatible with standard AI software. [Company] [External]

Sources

Arago site — arago.inc [Company] · EE Times / Design-Reuse, "French Startup Combines Electronics, Photonics And Optics For AI" — design-reuse.com [External] · All About Circuits, "Arago's Light-Speed Gamble" — allaboutcircuits.com [External] · Tech Funding News — techfundingnews.com [External] · Tech.eu — tech.eu [External] · DCD — datacenterdynamics.com [External]